reversible counter
英 [rɪˈvɜːsəbl ˈkaʊntə(r)]
美 [rɪˈvɜːrsəbl ˈkaʊntər]
网络 双向计数器
双语例句
- Digital milliampere reversible counter
数字毫安可逆计数仪 - Design of four valued synchronous reversible counter based on the theory of three essential circuit elements A
基于电路三要素理论的四值同步可逆计数器设计 - Research on high speed reversible counter and FPGA accomplishment
高速可逆位置计数器的研究与FPGA实现 - Design and application of reversible and saturable counter
可逆饱和计数器的设计与应用 - Then the method of using GAL to design the eight bit binary reversible synchronous counter and a kind of logic design software& CUPL language are also introduced.
同时介绍一种通用逻辑设计软件&CUPL语言.文中着重介绍了八位二进制可逆同步计数器的功能特点及其用GAL设计的方法。 - Modification of underground loop reversible counter
地下活套可逆计数器的改进 - In its digital processing circuit, clock chip with high precision and temperature compensation is uesd as reference clock. High frequency reversible counter is used to count trimmed impulse signal forward or backward and two pathes SAW signals are selected timely by multichannel selector.
数字信号处理电路采用高精度、具有温度补偿的时钟芯片作为基准时钟，采用高频可逆计数器对整形后的脉冲信号进行正向或逆向计数，采用高性能的多路选择器控制两路SAW信号的定时选择。 - The method of design of ten's carry reversible counter by use of common array logic element GAL is introduced.
介绍用通用阵列逻辑器件GAL设计十进制可逆计数器的方法。 - According to the design parameters and design methods, the controller contains three main parts. The first part is to design the frequency modulation circuit which is composed of voltage controlled oscillator ( VCO), reversible counter, encoder, etc.
根据控制器的设计指标以及设计方案，该控制器分为三个主要部分：一是调频电路的设计，主要包括：压控振荡器VCO，可逆计数器，译码器等； - To keep the stability of motor ′ s speed, a ultrasonic motor driver with novel automatic frequency tracking is proposed in this paper, which mainly include window comparator, reversible counter, D/ A convertor and voltage controlled oscillator ( VCO).
为保持电机速度的稳定性，该文提出了一种具有新颖的频率自动跟踪功能的超声波电机驱动源。它使用窗口比较器、可逆计数器、D/A转换器和压控振荡器实现频率跟踪功能。 - Taking VHDL language design of modulo-4 reversible counter as an example, this paper introduces the characteristics of finite state machine and the design method and design process of finite state machine based on VHDL.
以同步模4可逆计数器的VHDL语言设计为例，介绍了VHDL和有限状态机的特点以及基于VHDL的有限状态机设计的方法和过程。 - Conventional electronic finely-divided and reversible counter have been replaced by computerizing and CRT display in the process of collecting and read-out the coordinate signal.
在坐标信号的提取与读出过程中，用计算法和CRT显示代替了传统的电子细分和可逆计数器； - This paper present a design of digital clock with two alarms and introduce some circuits concretely such as three input circuit, reversible counter and output decoder/ driver.
简述了一种双闹钟数字时钟芯片的设计分析，具体介绍了其中三态输入电路、可逆计数器、输出解码/驱动器等电路的设计。 - The thesis introduces the logic electrical circuit of the hoist's position indication device, analyzes the functions of Hall sensor, the principle of distinguishing direction for the hoist's up and down and the reversible counter.
介绍了提升机位置指示装置的逻辑电路方框图，分析了霍尔传感器的作用、提升机上升、下降时的方向判别原理及可逆计数器原理。 - SPWM signal is produced by comparing sine waveform with triangular carrier waveform. The standard sine waveform is generated by looking up the sine table, and the triangular carrier waveform is produced by a reversible counter.
SPWM信号的产生采用正弦波与三角载波比较的方法，标准正弦波采用查表法实现，三角载波用可逆计数器实现。 - Design of Ten's Carry Reversible Counter by GAL
GAL十进制可逆计数器的设计 - The design of eight-bit binary reversible synchronous counter with GAL device
用GAL设计八位二进制可逆同步计数器 - Acceleration signal acquisition in the circuit, the use of VHDL hardware description language design a reversible counter, the counter is latched structure, allowing the counting of the computer to read the data.
在加速度信号采集电路中，使用VHDL硬件描述语言设计了可逆计数器，该计数器具有锁存结构，允许在计数的同时计算机对数据进行读取。